Intel VTune and AMD uProf profiling skill for microarchitecture analysis. Use when analyzing hotspots, microarchitecture bottlenecks, memory access patterns, pipeline stalls, or using the roofline model. Covers VTune Community Edition (free) and AMD uProf as a free alternative. Activates on queries

Intel VTune & AMD uProf Purpose Guide agents through CPU microarchitecture profiling with Intel VTune Profiler (free Community Edition) and AMD uProf: hotspot identification, microarchitecture analysis, memory access pattern optimization, pipeline stall diagnosis, and roofline model analysis. Triggers "How do I use Intel VTune to profile my code?" "What are pipeline stalls and how do I reduce them?" "How do I analyze memory bandwidth with VTune?" "What is the roofline model and how do I use it?" "How do I use AMD uProf as a free alternative to VTune?" "My code has good cache hit rates but is still slow" Workflow 1. VTune setup (free Community Edition) 2. Analysis types Analysis What it finds When to use Hotspots CPU bound functions First step — find where time is spent Microarchitecture Exploration IPC, pipeline stalls, retired instructions After hotspot — why is the hotspot slow? Memory Access Cache misses, DRAM bandwidth, NUMA Memory bound code Threading Lock contention, parallel efficiency Multithreaded code HPC Performance Vectorization, memory, roofline HPC / scientific code I/O Disk and network bottlenecks I/O bound code 3. Hotspot analysis Build with debug info for meaningful symbols: 4. Microarchitecture exploration — pipeline stalls Key metrics to examine: Metric Meaning Good value IPC (Instructions Per Clock) How many instructions retire per cycle x86: aim for 2.0 CPI (Clocks Per Instruction) Inverse of IPC Lower is better Bad Speculation Branch mispredictions < 5% Front End Bound Instruction decode bottleneck < 15% Back End Bound Execution unit or memory stall < 30% Retiring Useful work fraction 70% ideal Memory Bound % cycles waiting for memory < 20% 5. Memory access analysis Reading DRAM bandwidth: If DRAM bound: optimize data layout (AoS → SoA), reduce working set, improve spatial locality. 6. AMD uProf — free alternative for AMD CPUs AMD uProf metrics map to VTune equivalents: Retired Instructions → IPC analysis Branch Mispredictions → Bad Speculation L1/L2/L3 Cache Misses → Memory Bound levels Data Cache Accesses → Cache efficiency 7. Roofline model The roofline model shows whether code is compute bound or memory bound by comparing achieved performance against hardware limits: Related skills Use skills/profilers/hardware counters for raw PMU event collection with perf stat Use skills/profilers/linux perf for perf based profiling on Linux Use skills/low level programming/cpu cache opt for memory access pattern optimization Use skills/low level programming/simd intrinsics for vectorization to increase FLOPS

intel-vtune-amd-uprof