hardware-counters

Hardware performance counter skill for low-level CPU analysis. Use when collecting PMU events with perf stat, using the PAPI library, measuring cache miss rates and branch misprediction ratios, computing IPC, or correlating PMU events to source lines. Activates on queries about hardware counters, PM

By mohitmishra786 · 410 installs

npx skills add mohitmishra786/low-level-dev-skills --skill hardware-counters

Source repository · Upstream listing

Hardware Performance Counters Purpose Guide agents through hardware performance counter analysis: collecting PMU events with perf stat e , using the PAPI library for portable counter access, interpreting cache miss rates and branch misprediction ratios, computing IPC, and correlating events to source lines with perf annotate . Triggers "How do I measure cache miss rate with perf?" "How do I count branch mispredictions?" "How do I compute IPC (instructions per clock) with perf?" "How do I use the PAPI library for hardware counters?" "How do I see which source lines cause the most cache misses?" "How do I measure memory bandwidth with performance counters?" Workflow 1. perf stat — basic counter collection 2. Specifying PMU events with e 3. Key metrics and thresholds Metric Formula Healthy Concerning IPC instructions / cycles 2.0 (modern x86) < 1.0 L1 miss rate L1 misses / L1 accesses < 1% 5% LLC miss rate LLC misses / LLC accesses < 1% 10% Branch miss rate branch misses / branches < 1% 5% MPKI misses per 1K instructions — L3 MPKI 10 = memory bound 4. Raw PMU events (CPU specific) For events not in the generic aliases, use raw event codes: 5. Source level annotation with perf record/annotate 6. PAPI — Portable API for hardware counters PAPI provides a portable C API across different CPU architectures: Common PAPI presets: Preset Event PAPI TOT INS Total instructions PAPI TOT CYC Total cycles PAPI L1 DCM L1 data cache misses PAPI L2 TCM L2 total cache misses PAPI L3 TCM L3 total cache misses PAPI BR MSP Branch mispredictions PAPI TLB DM Data TLB misses PAPI FP INS Floating point instructions PAPI VEC INS Vector/SIMD instructions 7. Intel PCM (Performance Counter Monitor) Related skills Use skills/profilers/intel vtune amd uprof for guided microarchitecture analysis Use skills/profilers/linux perf for perf record/report and flamegraph generation Use skills/low level programming/cpu cache opt for applying cache optimization patterns Use skills/low level programming/simd intrinsics for improving FLOPS/cycle metrics